Post Cleaning for FEOL CMP with Silica and Ceria Slurries

Post cleaning experiments for front end of the line (FEOL) CMP with silica and ceria slurries are carried out on commercial polishers with 300 mm oxide, nitride, and integrated shallow trench isolation (STI) wafers. Considering the charge attraction or repulsion between particles and wafer surface, both acidic and basic clean chemicals are applied at different stages in the post CMP process sequence. Diluted hydrogen peroxide in a non-contact megasonic cleaner is used to remove ceria abrasive particles and polish residues with high efﬁciency. On-platen buff clean with or without pad conditioning can make an impact on the post CMP cleaning performance. Post CMP cleaning splits are executed in order to evaluate the effectiveness of each of the process steps and their roles in the overall cleaning performance. © The Author(s) 2017. Published by ECS. This is an open access article distributed under the terms of the Creative Commons Attribution 4.0 License (CC BY,

For the manufacturing of Si-based semiconductors, CMP is utilized extensively to enable front end of the line (FEOL) processes such as shallow trench isolation (STI), Fin Field Effect Transistor (Fin-FET), deep-trench, inter-level dielectric (ILD), and poly-open (POC).Silica-based slurries are usually adopted for bulk oxide polish while ceria-based slurries are more suited for the final "buff" polish where high selectivity is required.The ever stringent requirements for scratch reduction lead to the trend of adopting nano-sized (< 60 nm) abrasive particles in all types of CMP slurries.However, the higher surface charges per area of these nanoparticles and the resulting stronger adhesion force between them and wafer surface necessitates the modification of the chemistry and optimization of post CMP (pCMP) cleaning process to meet the low defect requirement.
Between silica and ceria abrasive particles, the latter are heavier in weight and irregular in shape (as opposed to circular like silica), and hence may present more challenges for pCMP cleaning from weight and geometry point of view.However, atomic force microscope (AFM) measurement suggests that the adhesion force of irregular ceria is much lower than that of spherical silica on the surface of TEOS oxide, SiN x , and poly-Si in both acidic and basic pH regimes. 1 Unlike silica, ceria exhibit redox reactions on SiO x surface, which should be taken into account when selecting the chemicals for pCMP cleaning.Meanwhile, besides silica and ceria abrasive particles, a robust FEOL pCMP clean process need to remove organic additives from slurry itself; by-products or polish residues (PR) such as SiO x , SiN x , and poly-Si from the wafer; and debris from CMP consumables such as pad (PU, polyurethane), carrier (stainless steel), retaining ring (e.g., polyether ether ketone, PEEK), and roller brush (polyvinyl alcohol, PVA).
The selection of proper chemicals is often the first step toward pCMP cleaning.However, design of cleaning sequence, exploitation of the tool hardware, and optimization of process parameters are equally critical to achieve maximum cleaning efficiency. 2 During the final ("buff") polish step, for example, the use of hard vs. soft pads, in-situ vs. ex-situ conditioning, and pad rinse with DIW vs. clean chemical can all modulate defect generation to various degrees, and hence affect the overall post cleaning performance.In the post CMP clean module, cleaning with or without mechanical contact, brush or "pencil" cleaner, acidic vs. basic pH. . .etc. can all influence the final wafer defect counts.
In the current study, the zeta-potential of the materials involved during FEOL CMP is reviewed in order to design the post cleaning process.The reactive nature of ceria particles on SiO x surface will be exploited in order to develop the cleaning chemistry needed for particle removal.Post CMP cleaning splits are executed in order to evaluate the effectiveness of each of the process steps and their roles in the overall cleaning performance.The impacts of pad conditioning on post cleaning will be addressed as well.

Experimental
CMP experiments were conducted on 300 mm polishers with 3platen tool configurations, megasonic tank, brush station 1, brush station 2, and Marangoni dryer with diluted Isopropyl Alcohol (IPA) vapor for 14 nm STI and poly-open (POC) CMP.The slurries and clean chemicals involved in the process sequence and their respective pH are shown in Fig. 1.Specifically, platen 1 (P1) is used for bulk removal with a silica slurry, platen 2 (P2) is intended for end-point controlled buff polish with ceria slurry, while platen 3 (P3) is utilized for buff clean on a soft pad with an acidic clean chemical.The concentration of hydrogen peroxide in megasonic tank is between 2% and 10% by volume.
Surfscan SP3 defect inspection system with 60 nm resolution was employed to scan the blanket HDP SiO x and PECVD SiN x wafers.This is followed by SEM review to classify these defects as abrasive particles, pad debris, polish residue (PR), foreign material (FM), scratches, or other non CMP-related defects.An established defect library was utilized as the reference to assist the classification, based mainly on the surface morphology, and in the some cases, in-line EDX chemical analysis as well.Integrated wafers based on 14 nm design rule were employed to test new cleaning process during STI CMP as well.
The zeta potentials of the materials involved during a typical FEOL CMP process are displayed in Fig. 2. SiO x , CeO x , SiN x , PU, and PVA either exhibit all positive (at pH < 2) or all negative (at pH > 10) surface charges such that PR or FM consisted of these materials can be removed through built-in charge repulsion.However, for the P2 buff polish process operating at pH 5.2, ceria abrasive particles exhibit a near neutral to week positive surface potential while the oxide surface (SiO x ) and PU polish pad both show negative potential.As a consequence, ceria particles tend to adhere to the oxide and PU pad surface through the attractive forces between them.Therefore, in the down-stream post cleaning process, zeta potential as well as the reactive nature of ceria abrasives should be considered in order for more effective ceria particle removal from oxide wafer surface.In addition, to reduce P2 pad loading by ceria particles, pad conditioning by a diamond dresser becomes a critical step for overall PR and FM defect reduction.These points will be elaborated later.

Cleaning Mechanism of Ceria Particles
Post CMP clean for ceria abrasives.-Inthe natural states, both cerous (Ce 3+ ) and ceria (Ce 4+ ) coexist in abrasives.The surface of ceria particles is known to contain significantly more Ce 3+ ions than in the bulk. 6It is generally believed that ceria abrasives interact with the SiO x surface and remove the oxide chemically. 7,8Recent research suggests that Ce 3+ stabilized by an oxygen vacancy on the surface of ceria particles is the primary reactive species that interacts and polishes the oxide film. 9,10The addition of hydrogen peroxide to ceria slurry suppresses the SiO x removal rates remarkably by converting the active Ce 3+ to the non-reactive Ce 4+ , effectively reducing the concentration of "chemical tooth" and hence the reactivity with SiO x surface. 11,12he aforementioned chemical reactivity of ceria abrasives can be exploited to design a post CMP cleaning process.In this study, diluted hydrogen peroxide between 2% and 10% by volume is flushed into the non-contact megasonic cleaner to facilitate the removal of ceria abrasive particles.
Ceria can react with H 2 O 2 through reduction of Ce 4+ to Ce 3+ , and oxidation of H 2 O 2 to O 2 : 13 E red + E ox > 0 for the redox reactions to proceed.Alternatively, the reactions can proceed as oxidation of Ce 3+ to Ce 4+ , and reduction of H 2 O 2 to H 2 O: 14 E red + E ox > 0 for the redox reactions to proceed.
From redox potential point of view, Reactions 1 and 2 above are more favorable and Ce 4+ can be reduced to Ce 3+ in the presence of H 2 O 2 .However, such recovery of ceria to cerous would also revitalize the reactive nature of Ce 3+ toward SiO x surface, triggering the chemical reactions for oxide removal again.In fact, the observation that the addition of H 2 O 2 to ceria slurry significantly suppresses the SiO x removal rates suggests that Reactions of 3 and 4 instead, namely, the oxidation of Ce 3+ to Ce 4+ is responsible for the inertness of ceria in contact with H 2 O 2 .In a study by Heckert et al., X-ray photoelectron spectroscopy (XPS) and UV-visible spectroscopy analyses demonstrate a decrease in Ce 3 + /4 + ratio of ceria nanoparticles treated with 1.0 M and 0.1 M H 2 O 2 . 15A recent study by Guo et al. further reveals that, at millimolar (mM) concentration levels, H 2 O 2 can promote ceria nanoparticles' oxidase activity; however, such activity can be inhibited when the H 2 O 2 concentration is reduced to micromolar (μM) levels. 16In the current study, the concentration of H 2 O 2 in the megasonic tank is on the order of 1.0 M (between 10% and 2% by vol.).Consequently, the oxidation of Ce 3+ to Ce 4+ should be the main mechanism involved.
Therefore, in the current study of pCMP cleaning for ceria abrasives, with pH 2 on platen 3 and pH 4 in the megasonic tank, cerous receives positive charge from the solution and converts to ceria in the acidic environment.The now inert and non-reactive ceria abrasives can then be dislodged from oxide wafer surface.It should be noted that at this pH, there is attraction between ceria and PVA surface due to their weak positive and negative charges, respectively.Therefore, a non-contact cleaner such as the megasonic tank charged with acidic chemical agent is the most logical choice to execute the proposed clean.In addition, the non-contact cleaning approach can reduce the chance of re-deposition of the ceria back to wafer surface.Without any mechanical contact on the top, the dislodged particles are free to move off wafer surface assisted by the megasonic waves and spinning motion of the wafer.
Based on the above mechanisms and the process flow illustrated in Fig. 1, the post-CMP cleaning process in the present study would proceed as follows: 1. Buff clean on P3 with an acidic chemical and soft pad under a moderate down force for initial removal of large debris and particles carried over from P2.The use of a diamond grit pad conditioner can be added to help reduce the PR and FM by shredding off the pad surface feature with debris and particles embedded inside.2. Megasonic clean with diluted H 2 O 2 at pH 4 to dislodge the ceria particles.Besides the spinning of wafer, the application of megasonic power can provide additional agitation to assist the removal of abrasives.3. Brush cleaner 1 with a basic chemical at pH 10.5 to facilitate the removal of oxide and nitride debris, and the remaining ceria particles through charge repulsion.The mechanical contact between the rotating wafer and spinning PVA brushes provides the shear force for ease of particle removal.4. Brush cleaner 2 with the same basic chemical as in Brush cleaner 1.Chemical concentration, brush rpm, intermittent DIW rinse. . .etc. can all be tuned to maximize cleaning efficiency. 5. Marangoni dryer provides the final step of cleaning for removal of stain and water mark.

Results and Discussion
Cleaning of ceria abrasives.-Basedon the cleaning concepts and process sequence above, a series of post CMP cleaning experiments with various splits are tested with blanket oxide and nitride wafers to explore the abrasive/residue cleaning performance.To isolate effects of P3 buff clean and megasonic clean with H 2 O 2 , the chemical and process parameters used in the two brush clean stations, B1 and B2 are held constant across all splits in this study.The main attributes of the experiments are listed in Table I and their resulting net defect adders are shown in Fig. 3. Pictures showing common FEOL CMP defects are exhibited in Fig. 4.  The majority of defect adders are in the form of ceria abrasives, oxide polish debris, plus some scratches.The application of ex-situ pad conditioning on platen (i.e., S1) helps reduce the adders.Yet, it is the replacement of DIW with H 2 O 2 in the megasonic tank (i.e., S3) that brings about the most significant reduction in defect adders.As expected, megasonic power helps bring the defect adders further down (S3 and S4).Combining P3 pad conditioning and diluted H 2 O 2 clean with megasonic power leads to the lowest counts of ceria abrasives and residues (i.e., S5).Based on the result, S5 is selected as the new drive-to post CMP cleaning process for further assessment.
The silicon nitride polish is believed to proceed by a two-step mechanism.SiN x is first hydrolyzed to silicon dioxide and ammonia, and then the surface silicon dioxide is removed by the polishing action. 17Similar to the case of SiO x , the addition of hydrogen peroxide is known to significantly inhibit the polish rates of SiN x by ceria slurry. 9,11Therefore the same surface modification mechanism leading to the non-reactive ceria abrasives on silicon oxide can be operational in the case of silicon nitride during post cleaning.
Also observed from Fig. 3 is that silicon nitride wafers show consistently higher defect adders than HDP silicon oxide across all splits.It was reported by Hong et al. that the adhesion force of irregular ceria particles is much higher on SiN x than on SiO x surface at pH 3, 7, and 11, based on theoretical calculation and AFM adhesion tests. 1 Consequently, relative to SiO x , more ceria particles will stick to SiN x surface, and a stronger force, chemical or mechanical, is needed to clean the ceria particles off.

Effects of pad conditioning and CVD conditioner.
-As a separate experiment, the conventional diamond-grit pad conditioner on platen 2 with ceria slurry is replaced by a "CVD conditioner", and its impacts on post CMP clean are evaluated.CVD conditioner is gaining growing acceptance in the industry for providing gentle and more uniform pad surface conditioning with demonstrated rate stability, lower scratches, and longer pad lifetime. 18In the present study, a CVD conditioner with pointed tips and lower pad cut rates than POR conditioner is selected for evaluation.
Blanket oxide removal rates with ceria slurry in the S5 process increase remarkably with the CVD conditioner as shown in Fig. 5.The rate enhancement suggests that the CVD conditioner may have reduced the pad surface roguhness to increase the effective contact area between SiO x wafer surface and ceria abrasives through pad asperities, leading to higher material removal through accelerated chemical reactions. 19,20owever, the use of CVD pad conditioner in conjunction with ceria slurry leads to an increase in ceria abrasive loading on wafer surface as shown in Fig. 6.The final defect adders are elevated with  the introduction of CVD conditioner on P2.The same mechanism for removal rates enhancement could have been responsible for the higher adders as well.The increase in the effective contact between SiO x surface and ceria abrasives translates to higher number of ceria particles residing on wafer surface.As a result, the diluted H 2 O 2 clean step has to work more intensively (e.g.longer time as in S6) to clean off the additional ceria particles.
Classifications of CMP defects from processes S4, S5, S5a, and S6 are presented in Fig. 7.A SEM picture showing pad debris with visible pad surface features is included in the inset for identification.Going from no pad conditioning (i.e.S4) to ex-situ conditioning (i.e.S5) on P3 effectively reduces PR/FM (including abrasives) defects, but pad debris increases slightly.Replacing the conventional conditioner with a CVD conditioner (i.e.S5a) helps brings down both pad debris and scratches, but PR/FM, especially ceria abrasives, increases again.Such uptick in PR/FM can be contained by applying longer (1.5X) megasonic clean time (i.e.S6).The results suggest that the sweeping conditioner across the pad effectively removes the pad surface feature and the ceria particles along with it, but otherwise generates pad debris which can adhere onto the wafer surface.The adhesion force between PU pad and ceria nano particles is found to be stronger in acidic media than in basic environment. 21Similar trend is observed for the adhesion between silicon nitride and PU pad surface. 5In this regard, alkaline chemistry is actually a more favorable choice on P3 pad to clean off the ceria particles carried over from P2.In the case of silicon nitride, the pad debris from P2 or P3 should be removed more efficiently in the brush clean steps (B1 and B2) with the basic chemical.On the other hand, the opposite trend is observed for silica abrasives on PU pad surface, i.e. weaker adhesion force in acidic media. 5As a consequence, the P3 pad buff clean with acidic chemical would become the critical first step to clean silica abrasives.
The above study is a clear illustration that any changes in consumable or process parameters in the upstream CMP process steps can have dramatic impacts on the down-stream post cleaning performance.In addition, the choice of cleaning chemistries and the steps to apply them at would vary, depending on the materials to be cleaned (e.g.oxide vs. nitride).When applying CVD pad conditioner to the ceria abrasive polish step, the characterization of pad surface asperity and wear rates is needed to assess its potential impacts on cleaning.Similarly, when changing the pad conditioning of the P3 buff clean step, for example, caution should be taken to avoid the built-up of PU pad debris on wafer surface that will increase the loading for post CMP cleaning.In general, despite the benefits gained from using CVD conditioners, adjustment in post cleaning process and even certain trade-off may be needed for overall defect reduction.For instance, for STI CMP application, scratch reduction is usually the most critical requirement from device performance point of view.While the utilization of CVD conditioner can help lower the scratch counts, it may lead to an increase in residual ceria abrasives, which, depending on their size and location, can exacerbate into patterning defects in the subsequent process and yield loss eventually.In the current study, the latter can be addressed by introducing a longer megasonic clean with H 2 O 2 (i.e. the S6 process).
Post-cleaning surface roughness.-AFMscan was conducted on HDP oxide wafers in order to assess the impact of clean on surface roughness.As shown in Fig. 8, there is no discernible difference on roughness between megasonic clean with DIW clean and H 2 O 2 .The  result suggests no additional etching or roughening components on oxide wafer surface when the ceria particles are cleaned off by the diluted H 2 O 2 .However, both R ms and R max increase when megasonic power is applied to the tank with diluted H 2 O 2 .The high frequency sonic energy from megasonic waves has induced higher roughness, which can pose the concern for device reliability.
Post cleaning for 14 nm STI CMP.-Based on the above results from blanket wafers, a go-to post CMP cleaning process is identified as follows: P3 on-pad buff clean with acidic clean chemical plus exsitu conditioning with conventional conditioner; diluted H 2 O 2 clean without megasonic power; and brush clean with basic chemical.In other words, it is the S5 process in Table I, except without megasonic power during diluted H 2 O 2 clean.
The aforementioned go-to process is tested on 14 nm STI integrated wafers and the results are summarized in Fig. 9.The go-to process leads to lower CMP defect density (57% vs. POR's 84%) with reduced lot-to-lot variation.The improvement results mainly from reduction of PR and FM, including ceria abrasives, despite the slight increase in pad debris from conditioning.Modification of zeta potential.-Itshould be noted that the zeta potential of silica and ceria particles can be modulated by different manufacturing processes.In fact, advances in colloidal technologies have produced modified silica and ceria abrasive particles with higher surface charges.As a consequence, the post CMP cleaning process and chemistry need to be re-designed in order to maximize particle removal efficiency.An example for modified electrokinetics of ceria particles is given in Fig. 10. 22The surface charges are higher in both low and high pH regimes on the modified ceria particles.Such change in electrokinetics can be exploited to faciliate the removal of ceria abrasives by, for example, by operating the cleaning process at pH > 9 where the surface repulsion between ceria and silicon oxide becomes stronger.Future work in post CMP clean with ceria slurries should take into account the wide variations in the type of ceria abrasives and the restuling differences in their electrokinectics.

Conclusions
In this study, post CMP clean process is designed and tested, considering the zeta-potential and adhesion forces of the materials, and the entire process sequence.Ceria abrasive particles can be cleaned off from silicon oxide and sicon nitride surfaces by diluted hydrogen peroxide rinse in a non-contact megasonic cleaner.Megasonic power can enhance the cleaning efficiency but would induce surface roughness on oxide.Changes in pad conditioning process on the polish platen can increase particle loading and pad debris built-up on wafer surface.

Figure 1 .
Figure 1.CMP process sequence and the slurries/chemicals involved in each step.The pH at point-of-use (POU) is also labeled for each slurry and chemical.

Figure 2 .
Figure 2. Zeta potential of common materials involved during the FEOL CMP process with both silica and ceria slurries.Data are reproduced from References 3, 4, and 5.

Figure 3 .
Figure 3. Net defect adders of the 6 post CMP clean processes listed in Table I for HDP silicon oxide and silicon nitride.SEM pictures showing ceria abrasive particles are shown in the insets.

Figure 5 .
Figure 5. Blanket oxide removal rates of S5 process with ceria slurry: conventional pad conditioner vs. CVD conditioner.

Figure 4 .
Figure 4. SEM pictures of common defects observed during FEOL CMP.

Figure 7 .
Figure 7. Classification of CMP defects of processes S4, S5, S5a, and S6 on oxide surface.Ceria particles are lumped into the PR & FM category.A photo of P3 pad debris is shown in the inset.

Figure 9 .
Figure 9.Total CMP defects on 14 nm STI wafers from POR and go-to processes.The go-to process is similar to S5 in Table I except without megasonic power.Each data point represents the mean of 3 wafers from a 14 nm lot.The inset shows the summary of defect classifications for the 2 processes.